I have enhanced wspy to add –set-counters option.
Following is how this looks from my default config file:
command --counterinfo /home/mev/.wspy/counters command --set-counters instructions,cpu-cycles command --set-counters 0:cache-misses,cache-references,cpu-cycles,instructions command --set-counters 1:branch-misses,branch-instructions,cpu-cycles,instructions command --set-counters 2:mem-stores,mem-loads,data_writes,data_reads command --set-counters 3:PERF_COUNT_SW_CPU_MIGRATIONS,PERF_COUNT_SW_CONTEXT_SWITCHES,PERF_COUNT_SW_PAGE_FAULTS command --set-counters 4:PERF_COUNT_HW_CACHE_L1D_RD_ACCESS,PERF_COUNT_HW_CACHE_L1D_RD_MISS,cpu-cycles,instructions command --set-counters 5:PERF_COUNT_HW_CACHE_DTLB_RD_MISS,PERF_COUNT_HW_CACHE_ITLB_RD_MISS,cpu-cycles,instructions command --set-counters 6:PERF_COUNT_HW_CACHE_LL_RD_ACCESS,PERF_COUNT_HW_CACHE_LL_RD_MISS,cpu-cycles,instructions command --set-counters 7:PERF_COUNT_HW_CACHE_NODE_RD_ACCESS,PERF_COUNT_HW_CACHE_NODE_WR_ACCESS,cpu-cycles,instructions
This counter option takes a list of cores, in this case I default to running separate counters for each CPU. These counter definitions come from multiple sources. The first ones such as cache-misses or data_writes come from the /sys/devices/* information exported by the Linux kernel. This provides event information that looks like:
mev@popayan:~$ cd /sys/devices/uncore_imc/ mev@popayan:/sys/devices/uncore_imc$ cat type 7 mev@popayan:/sys/devices/uncore_imc$ ls events data_reads data_reads.scale data_reads.unit data_writes data_writes.scale data_writes.unit mev@popayan:/sys/devices/uncore_imc$ cat events/data_reads event=0x01 mev@popayan:/sys/devices/uncore_imc$ cat events/data_reads.unit MiB mev@popayan:/sys/devices/uncore_imc$ cat events/data_reads.scale 6.103515625e-5
What this tells me is that if I call perf_event_open(2) with a type field of “7” and a counter number of 0x01, then I will count data reads from the memory controller. If this number is multiplied by 6.10e-5, then I will get the number of MiB. In other words, each count is one 64-byte value.
For some of the other counters above, I included a directory /home/mev/.wspy/counters, that contains some of the standard options given for perf_event_read(2). For example, the PERF_COUNT_SW_CPU_MIGRATIONS can be retrieved using a type of “3” and a config value of 0x4, so I created similar options.
What I haven’t yet done is create a similar counter directory for performance counters that might be documented. These are specific per processor, for example Intel Haswell seems to be documented here.