-------------------------------------------------------------------------------- CPU name: Intel(R) Core(TM) i7-4770S CPU @ 3.10GHz CPU type: Intel Core Haswell processor CPU clock: 3.09 GHz -------------------------------------------------------------------------------- Group 1: TLB_DATA +---------------------------------+---------+--------+--------+--------+--------+--------+----------+--------+--------+ | Event | Counter | Core 0 | Core 1 | Core 2 | Core 3 | Core 4 | Core 5 | Core 6 | Core 7 | +---------------------------------+---------+--------+--------+--------+--------+--------+----------+--------+--------+ | INSTR_RETIRED_ANY | FIXC0 | 7567 | 1973 | 1048 | 1983 | 2026 | 74029060 | 8915 | 1048 | | CPU_CLK_UNHALTED_CORE | FIXC1 | 16478 | 2245 | 1983 | 2282 | 4192 | 27642500 | 24019 | 1630 | | CPU_CLK_UNHALTED_REF | FIXC2 | 14260 | 1984 | 1767 | 2046 | 3720 | 24483428 | 21297 | 1426 | | DTLB_LOAD_MISSES_CAUSES_A_WALK | PMC0 | 153 | 1 | 16 | 1 | 1 | 6399 | 83 | 1 | | DTLB_STORE_MISSES_CAUSES_A_WALK | PMC1 | 6 | 0 | 0 | 0 | 0 | 18 | 2 | 0 | | DTLB_LOAD_MISSES_WALK_DURATION | PMC2 | 3378 | 3 | 225 | 3 | 33 | 26534 | 2279 | 2 | | DTLB_STORE_MISSES_WALK_DURATION | PMC3 | 89 | 0 | 0 | 0 | 0 | 614 | 56 | 0 | +---------------------------------+---------+--------+--------+--------+--------+--------+----------+--------+--------+ +--------------------------------------+---------+----------+------+----------+--------------+ | Event | Counter | Sum | Min | Max | Avg | +--------------------------------------+---------+----------+------+----------+--------------+ | INSTR_RETIRED_ANY STAT | FIXC0 | 74053620 | 1048 | 74029060 | 9.256702e+06 | | CPU_CLK_UNHALTED_CORE STAT | FIXC1 | 27695329 | 1630 | 27642500 | 3.461916e+06 | | CPU_CLK_UNHALTED_REF STAT | FIXC2 | 24529928 | 1426 | 24483428 | 3066241 | | DTLB_LOAD_MISSES_CAUSES_A_WALK STAT | PMC0 | 6655 | 1 | 6399 | 831.8750 | | DTLB_STORE_MISSES_CAUSES_A_WALK STAT | PMC1 | 26 | 0 | 18 | 3.2500 | | DTLB_LOAD_MISSES_WALK_DURATION STAT | PMC2 | 32457 | 2 | 26534 | 4057.1250 | | DTLB_STORE_MISSES_WALK_DURATION STAT | PMC3 | 759 | 0 | 614 | 94.8750 | +--------------------------------------+---------+----------+------+----------+--------------+ +-----------------------------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+ | Metric | Core 0 | Core 1 | Core 2 | Core 3 | Core 4 | Core 5 | Core 6 | Core 7 | +-----------------------------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+ | Runtime (RDTSC) [s] | 83.9970 | 83.9970 | 83.9970 | 83.9970 | 83.9970 | 83.9970 | 83.9970 | 83.9970 | | Runtime unhalted [s] | 5.327764e-06 | 7.258666e-07 | 6.411552e-07 | 7.378297e-07 | 1.355382e-06 | 0.0089 | 7.765965e-06 | 5.270212e-07 | | Clock [MHz] | 3573.9172 | 3499.7272 | 3470.9286 | 3449.6063 | 3485.2814 | 3491.9226 | 3488.1569 | 3535.3108 | | CPI | 2.1776 | 1.1379 | 1.8922 | 1.1508 | 2.0691 | 0.3734 | 2.6942 | 1.5553 | | L1 DTLB load misses | 153 | 1 | 16 | 1 | 1 | 6399 | 83 | 1 | | L1 DTLB load miss rate | 0.0202 | 0.0005 | 0.0153 | 0.0005 | 0.0005 | 0.0001 | 0.0093 | 0.0010 | | L1 DTLB load miss duration [Cyc] | 22.0784 | 3 | 14.0625 | 3 | 33 | 4.1466 | 27.4578 | 2 | | L1 DTLB store misses | 6 | 0 | 0 | 0 | 0 | 18 | 2 | 0 | | L1 DTLB store miss rate | 0.0008 | 0 | 0 | 0 | 0 | 2.431478e-07 | 0.0002 | 0 | | L1 DTLB store miss duration [Cyc] | 14.8333 | nan | nan | nan | nan | 34.1111 | 28 | nan | +-----------------------------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+ +----------------------------------------+------------+--------------+-----------+-----------+ | Metric | Sum | Min | Max | Avg | +----------------------------------------+------------+--------------+-----------+-----------+ | Runtime (RDTSC) [s] STAT | 671.9760 | 83.9970 | 83.9970 | 83.9970 | | Runtime unhalted [s] STAT | 0.0089 | 5.270212e-07 | 0.0089 | 0.0011 | | Clock [MHz] STAT | 27994.8510 | 3449.6063 | 3573.9172 | 3499.3564 | | CPI STAT | 13.0505 | 0.3734 | 2.6942 | 1.6313 | | L1 DTLB load misses STAT | 6655 | 1 | 6399 | 831.8750 | | L1 DTLB load miss rate STAT | 0.0474 | 0.0001 | 0.0202 | 0.0059 | | L1 DTLB load miss duration [Cyc] STAT | 108.7453 | 2 | 33 | 13.5932 | | L1 DTLB store misses STAT | 26 | 0 | 18 | 3.2500 | | L1 DTLB store miss rate STAT | 0.0010 | 0 | 0.0008 | 0.0001 | | L1 DTLB store miss duration [Cyc] STAT | 0 | 0 | 0 | 0 | +----------------------------------------+------------+--------------+-----------+-----------+